1/4 rev. a structure silicon monolithic integrated circuit product name 6ch video driver ( for dvd ) type BH7856FS outer dimensions fig.1 ssop-a32 plastic package block diagram fig.2 feature 1) built in lpf with characteristics suited to dvd players and recorders (y, c, y/c mix : 6.75mhz, py/g ,pb/b, and pr/r : 13.5mhz) 2) built in 6ch video driver (y, c, y/c mix, py/g, pb/b, and pr/r ) 3) 75? 2 driver (y, c, y/c mix,py/g, pb/b and pr/r) 4) built in mute switch ( double as power save function ) 5) built in s1/s2 circuit 6) built in selection switch for scart connector (cvbs,r or c,y output) absolute maximu m ratings(ta=25 ) parameter symbol limits unit supply voltage vccmax 6.0 v power dissipation pd 1.35 *1 w terminal applied voltage vin -0.3 vcc+0.3 v storage temperature range stg -55 +125 *1 when mounted on a 100mm 100mm 1.6mmt pcb board, the rated values are reduced at 13.5mw/ when temperature exceeds 25 . (glass epoxy substrate) operating range parameter symbol limits unit supply voltage vcc +4.5 +5.5 v operation temperature range opr -40 +85 * this product is not designed for protection against radioactive rays.
2/4 rev. a electrical characteristics ta = 2 5 , vcc=5.0v unless otherwise specified parameter symbol specification unit testing condition min typ max circuit current 1 i cc1 50 75 100 ma no signal 6ch active mode circuit current 2 i cc2 25 45 65 ma no signal mute1 on (c,y,cv system) circuit current 3 i cc3 15 35 55 ma no signal mute2 on (py/g, pb/b, pr/r system) circuit current 4 i cc4 1 2.5 5 ma no signal mute1 & mute2 on output dynamic range 1 v om1 2.4 3.0 vpp f=10 khz, thd = 1.0% c, py/g(bias), p /b,p /r output dynamic range 2 v om2 2.4 2.8 vpp f=10 khz, thd = 1.0% cv,y,mix, py/g(clamp) voltage gain c g vc 5.6 6 6.4 db cin f=3.58mhz, 1vpp c-pr/r(sel3="h") g vcpr 5.6 6 6.4 db cin f=3.58mhz, 1vpp mix(c) g vmixc 5.6 6 6.4 db cin f=3.58mhz, 1vpp mix(y) g vmixy 5.6 6 6.4 db yin f=1mhz, 1vpp cv g vcvin 5.6 6 6.4 db cvin f=1mhz, 1vpp y-cv(sel3="h") g vycv 5.6 6 6.4 db yin f=1mhz, 1vpp y g vy 5.6 6 6.4 db yin f=1mhz, 1vpp py/g (clamp/bias) g vpy 5.6 6 6.4 db py/g in f=1mhz, 1vpp pb/b g vpb 5.6 6 6.4 db pb/b in f=1mhz, 1vpp pr/r g vpr 5.6 6 6.4 db pr/r in f=1mhz, 1vpp frequency characteristics 1 (cin cvin yin) f11 -1.5 -0.5 0.5 db fin=100k/6.75mhz, 1vpp f12 -33 -25 db fin=100k/27mhz, 1vpp frequency characteristics 2 (py/g in pb/b in pr/r in) f21 -1.5 -0.5 0.5 db lpf13.5mhz fin=100k/13.5mhz, 1vpp f22 -30 -23 db lpf13.5mhz fin=100k/54mhz, 1vpp crosstalk ct -60 -50 db fin=4.43mhz, 1vpp mute attenuation -60 -50 db cin : f = 4.43mhz, 1vpp yin,cvin,py/gin,pb/bin,pr/rin : f=1mhz, 1vpp s-dcout voltage l v sdcl 0.1 0.5 v rl=10k +100k s1=l,s2=l m v sdcm 1.9 2.1 2.3 v rl=10k +100k s1=l,s2=h s1=h,s2=h h v sdch 4.3 4.6 v rl=10k +100k s1=h,s2=l mute control voltage v thh 2.0 vcc v mute off v thl gnd 0.7 v mute on
3/4 rev. a outer dimensions operation mode table parameter symbol specification unit testing condition min typ max sel1 cv /mix control voltage v thh 2.0 vcc v cv mode cvin cv_y out v thl gnd 0.7 v mix mode cin,yin cv_y out sel2 (bias/clamp) control voltage v thh 2.0 vcc v bias mode py/g in py/g out v thl gnd 0.7 v clamp mode py/g in py/g out sel3 (scart out/6ch out) control voltage v thh 2.0 vcc v scart out mode yin cv_y out cin pr/r_c out v thl gnd 0.7 v 6ch out mode cvin cv_y out pr/r in pr/r_c out s1/s2 control voltage v thh 2.0 vcc v high v thl gnd 0.7 v low control terminal input current lh 155 a h= 4.5v ll 20 a vl = 0.4v cout cv_y out yout py/g out pb/b out pr/r_c out 1llll 2 l l l h 3 l l h l 4 l l h h 5 l h l l py/g in pb/b in pr/r in 6 l h l h 7 l h h l py/g in pb/b in pr/r in 8 l h h h 9 h l l l cin yc mix yin 10 h l l h cin yin yin cin 11hlhlcincv inyin 12 h l h h cin yin yin cin 13 h h l l cin yc mix yin py/g in pb/b in pr/r in 14 h h l h cin yin yin cin 15 h h h l cin cv in yin py/g in pb/b in pr/r in 16hhhhcinyinyincin * when sel3"h", py,pb,pr block power on without mute2="h", but py andpb block are no signal output. * "" express no output. and other output signal from input pin written in table. sel3 output signal operation mode mute1 mute2 sel1 fig.1 outer dimensions ssop-a32( unit mm ) table.1 operation mode table lot. no. BH7856FS
4/4 rev. a block diagram pin number/pin name cautions on use (1) absolute maximum ratings this ic may be damaged if the absolute maximum ratings for the applied voltage, temperature range, or other parameters are exceeded. therefore, avoid using a voltage or temper ature that exceeds the absolute maximum ratings. if it is possible that absolute maximum ratings will be exceeded, use fuses or other physical safety measures and determine ways to avoid exceeding the ic's absolute maximum ratings. (2) gnd voltage make setting of the potential of the gnd terminal so that it will be maintained at the minimum in any operating state. furtherm ore, check to be sure no terminals are at a potential lower than the gnd voltage including an actual electric transient. (3) thermal design ensure sufficient margins to the thermal design by taking in to account the allowable power dissipation during actual use modes . (4) shorting between pins and mounting errors when mounting the ic chip on a board, be very careful to set the chip's orientation and position precisely. when the power is turned on, the ic may be damaged if it is not mounted correctly. the ic may also be damaged if a short occurs (due to a forei gn object, etc.) between two pins, between a pin and the power supp ly, or between a pin and the gnd. (5) operation in strong magnetic fields note with caution that operation faults may occur when this ic operates in a strong magnetic field. (6) place the power supply bypass capacitor as cl ose as possible to the vcc pin (pin1, pin16). (7) when not using a s ag correction circuit connect the sag correction pin and out put pin as closely as possible. there is a danger of high frequency oscillation. also make the distance from the output pin (out pin, sag pin) to the 75 resistance as short as possible. (8) when using a sag correction circuit make the length of the output pin (out pin, sag pin) and capacitor as short as possible. there is a danger of high frequency oscillation. also make the distance from the output pin (out pin, sag pin) to the 75 resistance as short as possible. if these cautions is not observed in board layout, connect a capacitor (0.01 f~0.1 f) as short as possibl no. pin name 1 vcc1 2 s1 3 s2 4 cin 5 mute1(off/on) 6 cv in 7 sel1(cv/mix) 8 y in 9 bias 10 sel2(bias/clamp) 11 py/g in 12 test 13 pb/b in 14 mute2(off/on) 15 pr/r in 16 vcc2 17 pr/r_c out sag 18 pr/r_c out 19 gnd 20 pb/b out sag 21 pb/b out 22 gnd 23 py/g out sag 24 py/g out 25 gnd 26 yout sag 27 yout 28 sel3 (scart out/6ch out) 29 cv_y out sag 30 cv_y out 31 s-dcout 32 cout pin name state h l h l h l h l h l function sel1 sel2 cvincv_y output mode mix(cin,yin)cv_y output mode bias mode (py/g input) clamp mode (py/g input) mute1 mute2 sel3 scart output mode 6ch output mode c, cv, y block mute off c, cv, y block mute py/g, pb/b, pr/r block mute off py/g, pb/b, pr/r block mute fig.2 block diagram table.2 control pin function 9 8 6 7 5 4 10 11 12 13 14 15 16 1 2 3 24 25 27 26 28 29 23 22 21 20 19 18 17 32 31 30 vcc1 s 1 s 2 cin mu t e 1 (mut e off/on) cvin sel1(cv/m i x) y in b i a s sel2( bias/ clamp) py/g in test pb/b in pr/r in vcc2 cout s-dcout cv_y out cv_y out sag sel3 scart out/ 6ch out ) y out y out sag gnd py/g out py/g out sag gnd pb/b out pb/b out sag gnd pr/r_c out pr/r_c out sag 75 mute2(py, pb, pr block) mut e1(c, cv, y block) 6db bias clamp clamp bias clamp bias bias bias 6db 75 75 6db 75 l h 6db s-dcout s1/s2 + 6db 6db 75 75 l h l h scart/6ch sel3 6. 75 mhz lpf 13. 5 mhz lpf 13. 5 mhz lpf 6. 75 mhz lpf 6. 75 mhz lpf 13. 5 mhz lpf h l * 1 2 p i n i s f o r t h e t e s t . p l e a s e s h o r t t h e t e s t p i n t o gn d . sel3 sel3 sel3 l on h off l on h off mu t e 2 (mut e off/on)
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